This monograph is based on the third author's lectures on computer architecture, given in the summer semester 2013 at Saarland University, Germany. It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory. The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory. This opens the way to the formal verification of synthesizable hardware for multi-core processors in the future. Constructions are in a gate level hardware model and thus deterministic. In contrast the reference models against which correctness is shown are nondeterministic. The development of the additional machinery for these proofs and the correctness proof of the shared memory at the gate level are the main technical contributions of this work.

This work is building on results from the book named “A Pipelined Multi-core MIPS Machine: Hardware Implementation and Correctness” by M. Kovalev, S.M. Müller, and W.J. Paul, published as LNCS 9000 in 2014. It presents, at the gate level, construction and correctness proof of a multi-core machine with pipelined processors and extensive operating system support with the following features: • MIPS instruction set architecture (ISA) for application and for system programming • cache coherent memory system • store buffers in front of the data caches • interrupts and exceptions • memory management units (MMUs) • pipelined processors: the classical five-stage pipeline is extended by two pipeline stages for address translation • local interrupt controller (ICs) supporting inter-processor interrupts (IPIs) • I/O-interrupt controller and a disk

This book constitutes the refereed proceedings of the 39th International Conference on Current Trends in Theory and Practice of Computer Science, SOFSEM 2013, held in Špindlerův Mlýn, Czech Republic, in January 2013. The 37 revised full papers presented in this volume were carefully reviewed and selected from 98 submissions. The book also contains 10 invited talks, 5 of which are in full-paper length. The contributions are organized in topical sections named: foundations of computer science; software and Web engineering; data, information, and knowledge engineering; and social computing and human factors.

This book is about a requirements specification for a Holodeck at a proof of concept level. In it I introduce optical functions for a optical processor and describe how they map to a subset of the Risc-V open instruction set. I describe how parallelism could be achieved. I then describe a possible layered approach to an optical processor motherboard for the datacenter and for a personal Holodeck. I describe Volumetrics in brief and show how its evolution to Holodeck volumetrics could be done with bend light technology and the possibility of solidness to touch. I describe in detail the architecture of a Holodeck covering several approaches to Holodecks from static scene to scrolling scene to multi-user same complex to networked multi-user Holodecks.

The Conference on Formal Methods in Computer-Aided Design (FMCAD) is an annual conference on the theory and applications of formal methods in hardware and system in academia and industry for presenting and discussing groundbreaking methods, technologies, theoretical results, and tools for reasoning formally about computing systems. FMCAD covers formal aspects of computer-aided system testing.

This volume constitutes the thoroughly refereed post-conference proceedings of the 10th International Conference on Verified Software: Theories, Tools, and Experiments, VSTTE 2018, held in Oxford, UK, in July 2018. The 19 full papers presented were carefully revised and selected from 24 submissions. The papers describe large-scale verification efforts that involve collaboration, theory unification, tool integration, and formalized domain knowledge as well as novel experiments and case studies evaluating verification techniques and technologies.

The computing world is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation. This book focuses on the shift, exploring the ways in which software and technology in the 'cloud' are accessed by cell phones, tablets, laptops, and more

Computer Organization and Design, Fifth Edition, is the latest update to the classic introduction to computer organization. The text now contains new examples and material highlighting the emergence of mobile computing and the cloud. It explores this generational change with updated content featuring tablet computers, cloud infrastructure, and the ARM (mobile computing devices) and x86 (cloud computing) architectures. The book uses a MIPS processor core to present the fundamentals of hardware technologies, assembly language, computer arithmetic, pipelining, memory hierarchies and I/O.Because an understanding of modern hardware is essential to achieving good performance and energy efficiency, this edition adds a new concrete example, Going Faster, used throughout the text to demonstrate extremely effective optimization techniques. There is also a new discussion of the Eight Great Ideas of computer architecture. Parallelism is examined in depth with examples and content highlighting parallel hardware and software topics. The book features the Intel Core i7, ARM Cortex-A8 and NVIDIA Fermi GPU as real-world examples, along with a full set of updated and improved exercises. This new edition is an ideal resource for professional digital system designers, programmers, application developers, and system software developers. It will also be of interest to undergraduate students in Computer Science, Computer Engineering and Electrical Engineering courses in Computer Organization, Computer Design, ranging from Sophomore required courses to Senior Electives. Winner of a 2014 Texty Award from the Text and Academic Authors Association Includes new examples, exercises, and material highlighting the emergence of mobile computing and the cloud Covers parallelism in depth with examples and content highlighting parallel hardware and software topics Features the Intel Core i7, ARM Cortex-A8 and NVIDIA Fermi GPU as real-world examples throughout the book Adds a new concrete example, "Going Faster," to demonstrate how understanding hardware can inspire software optimizations that improve performance by 200 times Discusses and highlights the "Eight Great Ideas" of computer architecture: Performance via Parallelism; Performance via Pipelining; Performance via Prediction; Design for Moore's Law; Hierarchy of Memories; Abstraction to Simplify Design; Make the Common Case Fast; and Dependability via Redundancy Includes a full set of updated and improved exercises

The pillars of the bridge on the cover of this book date from the Roman Empire and they are in daily use today, an example of conventional engineering at its best. Modern commodity operating systems are examples of current system programming at its best, with bugs discovered and fixed on a weekly or monthly basis. This book addresses the question of whether it is possible to construct computer systems that are as stable as Roman designs. The authors successively introduce and explain specifications, constructions and correctness proofs of a simple MIPS processor; a simple compiler for a C dialect; an extension of the compiler handling C with inline assembly, interrupts and devices; and the virtualization layer of a small operating system kernel. A theme of the book is presenting system architecture design as a formal discipline, and in keeping with this the authors rely on mathematics for conciseness and precision of arguments to an extent common in other engineering fields. This textbook is based on the authors' teaching and practical experience, and it is appropriate for undergraduate students of electronics engineering and computer science. All chapters are supported with exercises and examples.