The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.

In the “More than Moore” era, performance requirements for leading edge semiconductor devices are demanding extremely fine pitch interconnection in semiconductor packaging. Direct copper interconnection has emerged as the technology of choice in the semiconductor industry for fine pitch interconnection, with significant benefits for interconnect density and device performance. Low-temperature direct copper bonding, in particular, will become widely adopted for a broad range of highperformance semiconductor devices in the years to come. This book offers a comprehensive review and in-depth discussions of the key topics in this critical new technology. Chapter 1 reviews the evolution and the most recent advances in semiconductor packaging, leading to the requirement for extremely fine pitch interconnection, and Chapter 2 reviews different technologies for direct copper interconnection, with advantages and disadvantages for various applications. Chapter 3 offers an in-depth review of the hybrid bonding technology, outlining the critical processes and solutions. The area of materials for hybrid bonding is covered in Chapter 4, followed by several chapters that are focused on critical process steps and equipment for copper electrodeposition (Chapter 5), planarization (Chapter 6), wafer bonding (Chapter 7), and die bonding (Chapter 8). Aspects related to product applications are covered in Chapter 9 for design and Chapter 10 for thermal simulation. Finally, Chapter 11 covers reliability considerations and computer modeling for process and performance characterization, followed by the final chapter (Chapter 12) outlining the current and future applications of the hybrid bonding technology. Metrology and testing are also addressed throughout the chapters. Business, economic, and supply chain considerations are discussed as related to the product applications and manufacturing deployment of the technology, and the current status and future outlook as related to the various aspects of the ecosystem are outlined in the relevant chapters of the book. The book is aimed at academic and industry researchers as well as industry practitioners, and is intended to serve as a comprehensive source of the most up-to-date knowledge, and a review of the state-of-the art of the technology and applications, for direct copper interconnection and advanced semiconductor packaging in general.

This fourth volume of the landmark handbook focuses on the design, testing, and thermal management of 3D-integrated circuits, both from a technological and materials science perspective. Edited and authored by key contributors from top research institutions and high-tech companies, the first part of the book provides an overview of the latest developments in 3D chip design, including challenges and opportunities. The second part focuses on the test methods used to assess the quality and reliability of the 3D-integrated circuits, while the third and final part deals with thermal management and advanced cooling technologies and their integration.

The book presents the state of the art in high performance computing and simulation on modern supercomputer architectures. It covers trends in hardware and software development in general and specifically the future of high performance systems and heterogeneous architectures. The application contributions cover computational fluid dynamics, material science, medical applications and climate research. Innovative fields like coupled multi-physics or multi-scale simulations are presented. All papers were chosen from presentations given at the 14th Teraflop Workshop held in December 2011 at HLRS, University of Stuttgart, Germany and the Workshop on Sustained Simulation Performance at Tohoku University in March 2012. ​

This book constitutes the refereed proceedings of the 11th International Symposium on Applied Reconfigurable Computing, ARC 2015, held in Bochum, Germany, in April 2015. The 23 full papers and 20 short papers presented in this volume were carefully reviewed and selected from 85 submissions. They are organized in topical headings named: architecture and modeling; tools and compilers; systems and applications; network-on-a-chip; cryptography applications; extended abstracts of posters. In addition, the book contains invited papers on funded R&D - running and completed projects and Horizon 2020 funded projects.

An interdisciplinary guide to enabling technologies for 3D ICs and 5G mobility, covering packaging, design to product life and reliability assessments Features an interdisciplinary approach to the enabling technologies and hardware for 3D ICs and 5G mobility Presents statistical treatments and examples with tools that are easily accessible, such as Microsoft’s Excel and Minitab Fundamental design topics such as electromagnetic design for logic and RF/passives centric circuits are explained in detail Provides chapter-wise review questions and powerpoint slides as teaching tools

With the end of Moore’s Law, domain-specific architecture (DSA) has become a crucial mode of implementing future computing architectures. This book discusses the system-level design methodology of DSAs and their applications, providing a unified design process that guarantees functionality, performance, energy efficiency, and real-time responsiveness for the target application. DSAs often start from domain-specific algorithms or applications, analyzing the characteristics of algorithmic applications, such as computation, memory access, and communication, and proposing the heterogeneous accelerator architecture suitable for that particular application. This book places particular focus on accelerator hardware platforms and distributed systems for various novel applications, such as machine learning, data mining, neural networks, and graph algorithms, and also covers RISC-V open-source instruction sets. It briefly describes the system design methodology based on DSAs and presents the latest research results in academia around domain-specific acceleration architectures. Providing cutting-edge discussion of big data and artificial intelligence scenarios in contemporary industry and typical DSA applications, this book appeals to industry professionals as well as academicians researching the future of computing in these areas.

This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical interconnect, provide the foundations for the bulk of the book which brings together leading experts in the field of optical interconnect architectures for data communication. Particular emphasis is given to the ways in which the photonic components are assembled into architectures to address the needs of data-intensive on-chip communication, and to the performance evaluation of such architectures for specific applications.

This book discusses the opportunities offered by disruptive technologies to overcome the economical and physical limits currently faced by the electronics industry. It provides a new methodology for the fast evaluation of an emerging technology from an architectural prospective and discusses the implications from simple circuits to complex architectures. Several technologies are discussed, ranging from 3-D integration of devices (Phase Change Memories, Monolithic 3-D, Vertical NanoWires-based transistors) to dense 2-D arrangements (Double-Gate Carbon Nanotubes, Sublithographic Nanowires, Lithographic Crossbar arrangements). Novel architectural organizations, as well as the associated tools, are presented in order to explore this freshly opened design space.

This book enables readers to achieve ultra-low energy digital system performance. The author’s main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy.