Die Bandbreite und Zugriffszeit traditioneller DRAMs reicht nicht mehr aus, um mit der Geschwindigkeit moderner Mikroprozessoren Schritt zu halten. Daher baut man verstärkt Hochleistungs-Speicherchips, deren neue Generation das Thema dieses Buches bildet. Die Autorin, eine international anerkannte Spezialistin, diskutiert objektiv und herstellerunabhängig Technologien wie DDR DRAMs, CiDDR DRAMs, SL=DRAM, Direct Rambus, SSTL Interfaces und MP-DRAMs. Der aktuellste verfügbare Beitrag zu einem enorm wichtigen Thema! (12/98)

CMOS Processors and Memories addresses the-state-of-the-art in integrated circuit design in the context of emerging computing systems. New design opportunities in memories and processor are discussed. Emerging materials that can take system performance beyond standard CMOS, like carbon nanotubes, graphene, ferroelectrics and tunnel junctions are explored. CMOS Processors and Memories is divided into two parts: processors and memories. In the first part we start with high performance, low power processor design, followed by a chapter on multi-core processing. They both represent state-of-the-art concepts in current computing industry. The third chapter deals with asynchronous design that still carries lots of promise for future computing needs. At the end we present a “hardware design space exploration” methodology for implementing and analyzing the hardware for the Bayesian inference framework. This particular methodology involves: analyzing the computational cost and exploring candidate hardware components, proposing various custom architectures using both traditional CMOS and hybrid nanotechnology CMOL. The first part concludes with hybrid CMOS-Nano architectures. The second, memory part covers state-of-the-art SRAM, DRAM, and flash memories as well as emerging device concepts. Semiconductor memory is a good example of the full custom design that applies various analog and logic circuits to utilize the memory cell’s device physics. Critical physical effects that include tunneling, hot electron injection, charge trapping (Flash memory) are discussed in detail. Emerging memories like FRAM, PRAM and ReRAM that depend on magnetization, electron spin alignment, ferroelectric effect, built-in potential well, quantum effects, and thermal melting are also described. CMOS Processors and Memories is a must for anyone serious about circuit design for future computing technologies. The book is written by top notch international experts in industry and academia. It can be used in graduate course curriculum.

This book walks the reader through the next step in the evolution of NAND flash memory technology, namely the development of 3D flash memories, in which multiple layers of memory cells are grown within the same piece of silicon. It describes their working principles, device architectures, fabrication techniques and practical implementations, and highlights why 3D flash is a brand new technology. After reviewing market trends for both NAND and solid state drives (SSDs), the book digs into the details of the flash memory cell itself, covering both floating gate and emerging charge trap technologies. There is a plethora of different materials and vertical integration schemes out there. New memory cells, new materials, new architectures (3D Stacked, BiCS and P-BiCS, 3D FG, 3D VG, 3D advanced architectures); basically, each NAND manufacturer has its own solution. Chapter 3 to chapter 7 offer a broad overview of how 3D can materialize. The 3D wave is impacting emerging memories as well and chapter 8 covers 3D RRAM (resistive RAM) crosspoint arrays. Visualizing 3D structures can be a challenge for the human brain: this is way all these chapters contain a lot of bird’s-eye views and cross sections along the 3 axes. The second part of the book is devoted to other important aspects, such as advanced packaging technology (i.e. TSV in chapter 9) and error correction codes, which have been leveraged to improve flash reliability for decades. Chapter 10 describes the evolution from legacy BCH to the most recent LDPC codes, while chapter 11 deals with some of the most recent advancements in the ECC field. Last but not least, chapter 12 looks at 3D flash memories from a system perspective. Is 14nm the last step for planar cells? Can 100 layers be integrated within the same piece of silicon? Is 4 bit/cell possible with 3D? Will 3D be reliable enough for enterprise and datacenter applications? These are some of the questions that this book helps answering by providing insights into 3D flash memory design, process technology and applications.

Photo-Electroactive Non-Volatile Memories for Data Storage and Neuromorphic Computing summarizes advances in the development of photo-electroactive memories and neuromorphic computing systems, suggests possible solutions to the challenges of device design, and evaluates the prospects for commercial applications. Sections covers developments in electro-photoactive memory, and photonic neuromorphic and in-memory computing, including discussions on design concepts, operation principles and basic storage mechanism of optoelectronic memory devices, potential materials from organic molecules, semiconductor quantum dots to two-dimensional materials with desirable electrical and optical properties, device challenges, and possible strategies. This comprehensive, accessible and up-to-date book will be of particular interest to graduate students and researchers in solid-state electronics. It is an invaluable systematic introduction to the memory characteristics, operation principles and storage mechanisms of the latest reported electro-photoactive memory devices. - Reviews the most promising materials to enable emerging computing memory and data storage devices, including one- and two-dimensional materials, metal oxides, semiconductors, organic materials, and more - Discusses fundamental mechanisms and design strategies for two- and three-terminal device structures - Addresses device challenges and strategies to enable translation of optical and optoelectronic technologies

This book provides comprehensive coverage of the materials characteristics, process technologies, and device operations for memory field-effect transistors employing inorganic or organic ferroelectric thin films. This transistor-type ferroelectric memory has interesting fundamental device physics and potentially large industrial impact. Among the various applications of ferroelectric thin films, the development of nonvolatile ferroelectric random access memory (FeRAM) has progressed most actively since the late 1980s and has achieved modest mass production levels for specific applications since 1995. There are two types of memory cells in ferroelectric nonvolatile memories. One is the capacitor-type FeRAM and the other is the field-effect transistor (FET)-type FeRAM. Although the FET-type FeRAM claims ultimate scalability and nondestructive readout characteristics, the capacitor-type FeRAMs have been the main interest for the major semiconductor memory companies, because the ferroelectric FET has fatal handicaps of cross-talk for random accessibility and short retention time. This book aims to provide readers with the development history, technical issues, fabrication methodologies, and promising applications of FET-type ferroelectric memory devices, presenting a comprehensive review of past, present, and future technologies. The topics discussed will lead to further advances in large-area electronics implemented on glass or plastic substrates as well as in conventional Si electronics. The book is composed of chapters written by leading researchers in ferroelectric materials and related device technologies, including oxide and organic ferroelectric thin films.

This book provides a broad overview of current research in optical interconnect technologies and architectures. Introductory chapters on high-performance computing and the associated issues in conventional interconnect architectures, and on the fundamental building blocks for integrated optical interconnect, provide the foundations for the bulk of the book which brings together leading experts in the field of optical interconnect architectures for data communication. Particular emphasis is given to the ways in which the photonic components are assembled into architectures to address the needs of data-intensive on-chip communication, and to the performance evaluation of such architectures for specific applications.

Are memory applications more critical than they have been in the past? Yes, but even more critical is the number of designs and the sheer number of bits on each design. It is assured that catastrophes, which were avoided in the past because memories were small, will easily occur if the design and test engineers do not do their jobs very carefully. High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is based on the author's 20 years of experience in memory design, memory reliability development and memory self test. High Performance Memory Testing: Design Principles, Fault Modeling and Self Test is written for the professional and the researcher to help them understand the memories that are being tested.

For the technological progress in communication technology it is necessary that the advanced studies in circuit and software design are accompanied with recent results of the technological research and physics in order to exceed its limitations. This book is a guide which treats many components used in mobile communications, and in particular focuses on non-volatile memories. It emerges following the conducting line of the non-volatile memory in the wireless system: On the one hand it develops the foundations of the interdisciplinary issues needed for design analysis and testing of the system. On the other hand it deals with many of the problems appearing when the systems are realized in industrial production. These cover the difficulties from the mobile system to the different types of non-volatile memories. The book explores memory cards, multichip technologies, and algorithms of the software management as well as error handling. It also presents techniques of assurance for the single components and a guide through the Datasheet lectures.

A detailed, practical review of state-of-the-art implementations of memory in IoT hardware As the Internet of Things (IoT) technology continues to evolve and become increasingly common across an array of specialized and consumer product applications, the demand on engineers to design new generations of flexible, low-cost, low power embedded memories into IoT hardware becomes ever greater. This book helps them meet that demand. Coauthored by a leading international expert and multiple patent holder, this book gets engineers up to speed on state-of-the-art implementations of memory in IoT hardware. Memories for the Intelligent Internet of Things covers an array of common and cutting-edge IoT embedded memory implementations. Ultra-low-power memories for IoT devices-including plastic and polymer circuitry for specialized applications, such as medical electronics-are described. The authors explore microcontrollers with embedded memory used for smart control of a multitude of Internet devices. They also consider neuromorphic memories made in Ferroelectric RAM (FeRAM), Resistance RAM (ReRAM), and Magnetic RAM (MRAM) technologies to implement artificial intelligence (AI) for the collection, processing, and presentation of large quantities of data generated by IoT hardware. Throughout the focus is on memory technologies which are complementary metal oxide semiconductor (CMOS) compatible, including embedded floating gate and charge trapping EEPROM/Flash along with FeRAMS, FeFETs, MRAMs and ReRAMs. Provides a timely, highly practical look at state-of-the-art IoT memory implementations for an array of product applications Synthesizes basic science with original analysis of memory technologies for Internet of Things (IoT) based on the authors' extensive experience in the field Focuses on practical and timely applications throughout Features numerous illustrations, tables, application requirements, and photographs Considers memory related security issues in IoT devices Memories for the Intelligent Internet of Things is a valuable working resource for electrical engineers and engineering managers working in the electronics system and semiconductor industries. It is also an indispensable reference/text for graduate and advanced undergraduate students interested in the latest developments in integrated circuit devices and systems.

Nanoscale memories are used everywhere. From your iPhone to a supercomputer, every electronic device contains at least one such type. With coverage of current and prototypical technologies, Nanoscale Semiconductor Memories: Technology and Applications presents the latest research in the field of nanoscale memories technology in one place. It also covers a myriad of applications that nanoscale memories technology has enabled. The book begins with coverage of SRAM, addressing the design challenges as the technology scales, then provides design strategies to mitigate radiation induced upsets in SRAM. It discusses the current state-of-the-art DRAM technology and the need to develop high performance sense amplifier circuitry. The text then covers the novel concept of capacitorless 1T DRAM, termed as Advanced-RAM or A-RAM, and presents a discussion on quantum dot (QD) based flash memory. Building on this foundation, the coverage turns to STT-RAM, emphasizing scalable embedded STT-RAM, and the physics and engineering of magnetic domain wall "racetrack" memory. The book also discusses state-of-the-art modeling applied to phase change memory devices and includes an extensive review of RRAM, highlighting the physics of operation and analyzing different materials systems currently under investigation. The hunt is still on for universal memory that fits all the requirements of an "ideal memory" capable of high-density storage, low-power operation, unparalleled speed, high endurance, and low cost. Taking an interdisciplinary approach, this book bridges technological and application issues to provide the groundwork for developing custom designed memory systems.