This book constitutes the proceedings of the 19th International Workshop on OpenMP, IWOMP 2023, held in Bristol, UK, during September 13–15, 2023. The 15 full papers presented in this book were carefully reviewed and selected from 20 submissions. The papers are divided into the following topical sections: OpenMP and AI; Tasking Extensions; OpenMP Offload Experiences; Beyond Explicit GPU Support; and OpenMP Infrastructure and Evaluation.

This book constitutes the proceedings of the 12th International Workshop on OpenMP, IWOMP 2016, held in Nara, Japan, in October 2016. The 24 full papers presented in this volume were carefully reviewed and selected from 28 submissions. They were organized in topical sections named: applications, locality, task parallelism, extensions, tools, accelerator programming, and performance evaluations and optimization.

This book constitutes the refereed proceedings of the 10th International Workshop on OpenMP, held in Salvador, Brazil, in September 2014. The 16 technical full papers presented were carefully reviewed and selected from 18 submissions. The papers are organized in topical sections on tasking models and their optimization; understanding and verifying correctness of OpenMP programs; OpenMP memory extensions; extensions for tools and locks; experiences with OpenMP device constructs.

The 5th International Symposium on High Performance Computing (ISHPC–V) was held in Odaiba, Tokyo, Japan, October 20–22, 2003. The symposium was thoughtfully planned, organized, and supported by the ISHPC Organizing C- mittee and its collaborating organizations. The ISHPC-V program included two keynote speeches, several invited talks, two panel discussions, and technical sessions covering theoretical and applied research topics in high–performance computing and representing both academia and industry. One of the regular sessions highlighted the research results of the ITBL project (IT–based research laboratory, http://www.itbl.riken.go.jp/). ITBL is a Japanese national project started in 2001 with the objective of re- izing a virtual joint research environment using information technology. ITBL aims to connect 100 supercomputers located in main Japanese scienti?c research laboratories via high–speed networks. A total of 58 technical contributions from 11 countries were submitted to ISHPC-V. Each paper received at least three peer reviews. After a thorough evaluation process, the program committee selected 14 regular (12-page) papers for presentation at the symposium. In addition, several other papers with fav- able reviews were recommended for a poster session presentation. They are also included in the proceedings as short (8-page) papers. Theprogramcommitteegaveadistinguishedpaperawardandabeststudent paper award to two of the regular papers. The distinguished paper award was given for “Code and Data Transformations for Improving Shared Cache P- formance on SMT Processors” by Dimitrios S. Nikolopoulos. The best student paper award was given for “Improving Memory Latency Aware Fetch Policies for SMT Processors” by Francisco J. Cazorla.

This book constitutes the refereed proceedings of the 5th International Workshop on OpenMP, IWOMP 2009, held in Dresden, Germany in June 2009. The papers are organized in topical sections on performance and applications, runtime environments, tools and benchmarks as well as proposed extensions to OpenMP.

This book constitutes the refereed post-proceedings of the 10th International Symposium on Advanced Parallel Processing Technologies, APPT 2013, held in Stockholm, Sweden, in August 2013. The 30 revised full papers presented were carefully reviewed and selected from 62 submissions. The papers cover a wide range of topics capturing some of the state of the art and practice in parallel architecture, parallel software, concurrent and distributed systems, and cloud computing, with a highlight on computing systems for big data applications.

From basic architecture, interconnection, and parallelization to power optimization, this book provides a comprehensive description of emerging multicore systems-on-chip (MCSoCs) hardware and software design. Highlighting both fundamentals and advanced software and hardware design, it can serve as a primary textbook for advanced courses in MCSoCs design and embedded systems. The first three chapters introduce MCSoCs architectures, present design challenges and conventional design methods, and describe in detail the main building blocks of MCSoCs. Chapters 4, 5, and 6 discuss fundamental and advanced on-chip interconnection network technologies for multi and many core SoCs, enabling readers to understand the microarchitectures for on-chip routers and network interfaces that are essential in the context of latency, area, and power constraints. With the rise of multicore and many-core systems, concurrency is becoming a major issue in the daily life of a programmer. Thus, compiler and software development tools are critical in helping programmers create high-performance software. Programmers should make sure that their parallelized program codes will not cause race condition, memory-access deadlocks, or other faults that may crash their entire systems. As such, Chapter 7 describes a novel parallelizing compiler design for high-performance computing. Chapter 8 provides a detailed investigation of power reduction techniques for MCSoCs at component and network levels. It discusses energy conservation in general hardware design, and also in embedded multicore system components, such as CPUs, disks, displays and memories. Lastly, Chapter 9 presents a real embedded MCSoCs system design targeted for health monitoring in the elderly.

This book constitutes revised selected papers from the workshops held at the 28th International European Conference on Parallel and Distributed Computing, Euro-Par 2022, which took place in Glasgow, UK, in August 22–26, 2022 Out of a total of 35 submissions 24 papers have been accepted, 19 of these are included in this book. They stem from the following workshops: - Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar)- Workshop on Asynchronous Many-Task systems for Exascale (AMTE) - Workshop on Domain Specific Languages for High-Performance Computing (DSL-HPC)- Workshop on Distributed and Heterogeneous Programming in C and C++ (DHPCC++)- Workshop on Resiliency in High Performance Computing in Clouds, Grids, and Clusters (Resilience) In addition, the proceedings also contains 6 extended abstracts from the PhD Symposium.

Recent developments in information processing systems have driven the advancement of computational methods in the engineering realm. New models and simulations enable better solutions for problem-solving and overall process improvement. The Handbook of Research on Advanced Computational Techniques for Simulation-Based Engineering is an authoritative reference work representing the latest scholarly research on the application of computational models to improve the quality of engineering design. Featuring extensive coverage on a range of topics from various engineering disciplines, including, but not limited to, soft computing methods, comparative studies, and hybrid approaches, this book is a comprehensive reference source for students, professional engineers, and researchers interested in the application of computational methods for engineering design.